coreboot-kgpe-d16/src/northbridge/intel
Kyösti Mälkki 26c7b86907 Intel e7505: handlers for undocumented registers
Makes the code a bit more readable, IMO. There is no clean way
to implement this as the affected registers are undocumented.

Seems ROMCC cannot handle the enum. Also any of my future changes
would not be even abuild tested as there is no longer a board with
ROMCC and this chipset. E7505 chipset is CAR only from now on.

Change-Id: I0e2d8ba0c7ed7cce46d9eafb8d8badf04cf75f7a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/895
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-17 10:57:04 +02:00
..
e7501 Clear improper use of CONFIG_CACHE_AS_RAM 2011-10-28 22:13:50 +02:00
e7505 Intel e7505: handlers for undocumented registers 2012-04-17 10:57:04 +02:00
e7520 Move C labels to start-of-line 2012-03-07 17:48:03 +01:00
e7525 Move C labels to start-of-line 2012-03-07 17:48:03 +01:00
i440bx northbridge/intel/i440bx: Registered SDRAM modules support and fixes 2011-08-04 08:15:49 +02:00
i440lx We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic. 2010-12-13 19:50:25 +00:00
i855 remove trailing whitespace 2011-11-01 19:07:45 +01:00
i945 Unify IO APIC address specification 2012-04-12 00:06:11 +02:00
i3100 Move C labels to start-of-line 2012-03-07 17:48:03 +01:00
i5000 Remove non-existent include 2012-02-10 14:54:36 +01:00
i82810 fix i810 boards with ram init debugging disabled. 2010-12-29 21:02:50 +00:00
i82830 remove trailing whitespace 2011-11-01 19:07:45 +01:00
sandybridge Add support for Intel Sandybridge CPU (northbridge part) 2012-04-05 20:59:31 +02:00
sch Unify IO APIC address specification 2012-04-12 00:06:11 +02:00
Kconfig Add support for Intel Sandybridge CPU (northbridge part) 2012-04-05 20:59:31 +02:00
Makefile.inc Add support for Intel Sandybridge CPU (northbridge part) 2012-04-05 20:59:31 +02:00