Philipp Hug 7524400242 uart/sifive: make divisor configurable ... The SiFive UART on the HiFive Unleashed uses the tlclk as input clock which runs at coreclk / 2. The input frequency is configured in the board code depending on the current stage. (bootblock + romstage run at 33.33Mhz, ramstage at 1Ghz) Change-Id: Iaf66723dba3d308f809fde5b05dfc3e43f43bd42 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/27440 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>		2018-09-13 15:32:53 +00:00
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Kconfig	drivers/uart: Allow the 8250IO driver only on x86	2018-04-27 09:05:45 +00:00
Makefile.inc	drivers/uart: Add a driver for SiFive's UART	2018-04-25 11:42:52 +00:00
oxpcie.c	drivers/uart/oxpcie.c: Get rid of device_t	2018-05-04 10:20:24 +00:00
oxpcie_early.c
pl011.c	drivers/uart/pl011.c Add read support	2018-04-13 16:47:54 +00:00
pl011.h	drivers/uart/pl011: Improve PL011 driver	2018-02-13 01:19:40 +00:00
sifive.c	uart/sifive: make divisor configurable	2018-09-13 15:32:53 +00:00
uart8250io.c	arch/x86: Drop leftover ROMCC console support	2018-06-08 03:31:12 +00:00
uart8250mem.c	driver/uart: Introduce a way for mainboard to override the baudrate	2018-02-21 16:09:06 +00:00
uart8250reg.h
util.c	drivers/uart: Add helper function to allow bit-banging	2018-04-26 01:19:13 +00:00