Duncan Laurie 2af67c9878 broadwell: Add reporting of broadwell MCH revision ... Since the E0 and F0 stepping parts have the same CPUID it is necessary to use the MCH PCI device revision to determine what the actual stepping is. Add this decode table so the early output gives proper identification of the installed CPU type. BUG=chrome-os-partner:32359 BRANCH=samus,auron TEST=build and boot on samus with E0 and F0 parts Change-Id: Idce1e289cd958c77febc87395f27570247512a87 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: a5346141e45b105a35a7641f60b29e02ab2bdfa3 Original-Change-Id: I1bc127badd75ecc34d3d2dbae5d272bd4d9f9082 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/223158 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9228 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2015-04-02 13:24:28 +02:00
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baytrail	cbfs: correct types used for accessing files	2015-04-01 22:51:10 +02:00
broadwell	broadwell: Add reporting of broadwell MCH revision	2015-04-02 13:24:28 +02:00
common	bootstate: use structure pointers for scheduling callbacks	2015-03-18 16:41:43 +01:00
fsp_baytrail	intel/fsp_baytrail: Add PCI Root Port IRQ Routing	2015-03-12 20:35:49 +01:00
Kconfig	broadwell: Hook into the build system	2014-12-31 21:23:09 +01:00
Makefile.inc	broadwell: Hook into the build system	2014-12-31 21:23:09 +01:00