coreboot-kgpe-d16/src/soc
Richard Spiegel 2c5ea145a4 soc/amd/stoneyridge: Create MMIO offsets for ACPI
ACPI registers can be accessed through IO or through MMIO. However, the
offset relationship is not one to one. Therefore, definitions with the
correct offset for MMIO access are needed.

BUG=b:118049037
TEST=Use Chrome OS IOTOOLS io_readxx and mem_readxx to find the correct
relationship between ACPI IO and ACPI MMIO.

Change-Id: Id20754c0fc0af35bc9eb1a4b40c62fbf9ed6304d
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2018-12-03 13:21:21 +00:00
..
amd soc/amd/stoneyridge: Create MMIO offsets for ACPI 2018-12-03 13:21:21 +00:00
cavium (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
imgtec (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
intel soc/intel/cannonlake: Load FSP teardown optionally 2018-12-03 13:05:29 +00:00
mediatek mediatek/mt8183: Add DDR driver of rx dqs gating calibration part 2018-11-29 13:35:38 +00:00
nvidia security/vboot: Fix remaining measured boot issues 2018-11-30 10:26:56 +00:00
qualcomm sdm845: Add clock support 2018-11-30 21:12:30 +00:00
rockchip security/vboot: Fix remaining measured boot issues 2018-11-30 10:26:56 +00:00
samsung src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
sifive soc/sifive/fu540: Simplify UART refclk calculation 2018-12-03 13:18:04 +00:00
ucb riscv: add support smp_pause / smp_resume 2018-11-05 09:03:40 +00:00