Subrata Banik 2d1dd5943d soc/intel/common: Move update_mrc_cache after BS_DEV_ENUMERATE ... This patch ensures that MRC cache data is already written into SPI chip before SPI protected regions are getting locked during BS_DEV_RESOURCES-BS_ON_EXIT. This requirements are intended to support platform security guideline where all required chipset registers are expected to be in lock down stage before launching any 3rd party code as in option rom etc. coreboot has to change its execution order to meet those requirements. Hence storing mrc cache data into SPI has been moved right after pci enumeration is done, so that SPI registers can be lock down before calling post pci enumeration FSP NotifyPhase() API which is targeted to be done in BS_DEV_ENABLE-BS_ON_ENTRY. TEST=Ensure MRC training data is stored into SPI chip and power_ Resume autotest is passing. Change-Id: I8ee26b5cc70433438cf4e45e707b8a54f89cf9b0 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/21028 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-08-25 17:58:27 +00:00
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apollolake	soc/intel/apollolake: Allow overriding dev tree settings by board	2017-08-23 15:52:48 +00:00
baytrail	vboot: Remove get_sw_write_protect_state callback	2017-07-18 23:24:01 +00:00
braswell	soc/intel/braswell: Fix SPI write after FLOCKDN is set	2017-08-07 20:03:02 +00:00
broadwell	usbdebug: Refactor early enable	2017-08-07 12:35:42 +00:00
cannonlake	soc/intel/cannonlake: Add cpu.c and MP init support	2017-08-24 16:06:30 +00:00
common	soc/intel/common: Move update_mrc_cache after BS_DEV_ENUMERATE	2017-08-25 17:58:27 +00:00
fsp_baytrail	soc/intel: add IS_ENABLED() around Kconfig symbol references	2017-07-13 23:54:32 +00:00
fsp_broadwell_de	Rename __attribute__((packed)) --> __packed	2017-07-13 19:45:59 +00:00
quark	include/device: Split i2c.h into three	2017-08-18 15:33:29 +00:00
sch	arch/x86: Sanity checking on HAVE_SMI_HANDLER	2017-08-19 15:34:48 +00:00
skylake	soc/intel/skylake: Add LPC and SPI lock down config option	2017-08-25 17:58:08 +00:00