Lin Huang 2e3ebb604a rockchip/rk3399: mipi: correct phy parameter setting ... As MIPI PHY document show, icpctrl<3..0> and lpfctrl<5..0> should depend on frequency, so fix it. Change-Id: Ic4a90767bd1f22d5d784d4013dc7afb3149115c1 Signed-off-by: Lin Huang <hl@rock-chips.com> Reviewed-on: https://review.coreboot.org/22467 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>		2017-11-28 19:14:32 +00:00
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acpi	arch/x86: Add common AMD ACPI hardware definitions	2017-11-10 19:15:38 +00:00
arch	Constify struct cpu_device_id instances	2017-11-23 05:00:17 +00:00
commonlib	commonlib/helpers.h: Include stddef.h	2017-11-04 00:32:13 +00:00
console	console: Ignore loglevel in nvram until ramstage	2017-09-25 13:35:29 +00:00
cpu	Constify struct cpu_device_id instances	2017-11-23 05:00:17 +00:00
device	device: further untangle device_t from struct device	2017-11-15 05:19:42 +00:00
drivers	spi/tpm.c do not waste time on wake pulses unless necessary	2017-11-28 18:35:28 +00:00
ec	chromeec: Change the API for hostevent/wake masks to handle 64-bit	2017-11-22 19:10:26 +00:00
include	intel/common/block: Add SKL CSME device ID	2017-11-28 13:10:39 +00:00
lib	src: Fix all Siemens copyrights	2017-11-07 12:33:51 +00:00
mainboard	mb/google/poppy/variants/nautilus: set I2C speed to 400KHz	2017-11-28 19:11:04 +00:00
northbridge	nb/intel/gm45: Enable LAPIC monotonic timer	2017-11-03 16:19:27 +00:00
security	security/vboot: Move vboot2 to security kconfig section	2017-10-22 02:14:46 +00:00
soc	rockchip/rk3399: mipi: correct phy parameter setting	2017-11-28 19:14:32 +00:00
southbridge	AMD platforms: Fix ASL comment that implies "\_SB" is southbridge	2017-11-28 03:53:32 +00:00
superio	superio/acpi/pnp.asl: Fix PNP_READ_DMA/PNP_WRITE_DMA macros	2017-10-25 14:32:39 +00:00
vendorcode	vendorcode/amd/pi/00670F00: Halt build if headers aren't wrapped	2017-11-22 18:28:56 +00:00
Kconfig	intel/common/smbus: increase spd read performance	2017-10-31 15:49:55 +00:00