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Arthur Heymans 2f6b52e3a0 nb/intel/i945: Fix PEG port on 945gc
Vendor BIOS leaves UPMC1 untouched (on 945gc the default is 0x0203).

Not running PCIEx16 init which is valid for 945gm seems to fix all
issues and instabilities related to the PEG port.

According to lspci the link width is at the desired x16.
It is unknown if devices requesting a lower width work automatically
or need more configuration.

What happens is that IGD gets disabled by the disable function in
gma.c when an external GPU is found unless
CONFIG_ONBOARD_VGA_IS_PRIMARY is set.

Setting IGD as secondary makes Linux (4.10) hang, so this behavior is
a requirement for now.

TESTED on P5GC-MX with a discrete GPU and both
CONFIG_ONBOARD_VGA_IS_PRIMARY set and unset.

Change-Id: I6da8aa7714073f4b34df5ae3c1eb4c19e27ddc97
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18549
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-04-14 13:26:01 +02:00
3rdparty 3rdparty/libgfxinit: Update submodule pointer 2017-04-08 13:02:44 +02:00
Documentation Documentation: Reflow Kconfig.md 2017-04-11 16:18:57 +02:00
configs configs/builder: Remove pre-defined VGA bios file 2017-01-20 17:37:19 +01:00
payloads libpayload: Add gru config 2017-04-07 21:33:19 +02:00
src nb/intel/i945: Fix PEG port on 945gc 2017-04-14 13:26:01 +02:00
util util/intelmetool: Check for NULL return from pci_lookup_name 2017-04-04 20:48:34 +02:00
.checkpatch.conf checkpatch.conf: Update rules 2017-03-09 04:37:28 +01:00
.clang-format
.gitignore .gitignore: ignore *.swo and option *.roms 2017-03-10 11:06:20 +01:00
.gitmodules Set up 3rdparty/libgfxinit 2016-10-29 01:35:03 +02:00
.gitreview
COPYING
MAINTAINERS MAINTAINERS: Update list 2017-03-08 04:33:30 +01:00
Makefile Remove libverstage as separate library and source file class 2017-03-28 22:18:53 +02:00
Makefile.inc Makefile.inc: Fix jenkins build of nvramcui & coreinfo 2017-04-03 04:52:22 +02:00
README
gnat.adc gnat.adc: Do not generate assertion code for Refined_Post 2016-10-29 01:33:31 +02:00
toolchain.inc Remove libverstage as separate library and source file class 2017-03-28 22:18:53 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.