coreboot-kgpe-d16/src/northbridge/intel
Jonathan Neuschäfer 2f828ebb59 nb/intel/gm45/raminit: Use CxDRT*_MCHBAR instead of magic numbers
This is hopefully more readable.

TEST=Build lenovo/x200 with and without this patch (using make
BUILD_TIMELESS=1), compare build/coreboot.rom, notice no differences.

Change-Id: I079d5353633a3d58ce0e5e616f3fad687a064d65
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/23709
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-04 13:44:47 +00:00
..
common nb/intel/common: Write MRC cache at exit of BS_DEV_INIT 2017-09-05 08:27:51 +00:00
e7505 nb/intel: add IS_ENABLED() around Kconfig symbol references 2017-06-27 17:16:19 +00:00
fsp_rangeley nb/intel/fsp_rangeley/port_access.c: Add brackets around macro 2017-06-27 19:44:04 +00:00
fsp_sandybridge nb/intel/*.h: Remove left-over register definitions 2018-01-31 15:23:56 +00:00
gm45 nb/intel/gm45/raminit: Use CxDRT*_MCHBAR instead of magic numbers 2018-04-04 13:44:47 +00:00
haswell nb/intel/haswell;sb/intel/lynxpoint: Enable VT-d and X2APIC 2018-03-08 19:14:17 +00:00
i440bx intel/i440bx: Correct RAM init programming 2017-12-09 16:54:44 +00:00
i945 nb/intel/i945/gma: Log configured VGA mode 2018-03-03 15:19:38 +00:00
nehalem sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location 2018-02-27 09:46:29 +00:00
pineview nb/intel/pineview: Port ACPI opregion to pineview 2017-10-22 02:21:23 +00:00
sandybridge sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location 2018-02-27 09:46:29 +00:00
x4x device/ddr2,ddr3: Rename and move a few things 2018-02-22 10:07:53 +00:00