Michał Żygowski 2fffb5df88 soc/intel/alderlake/vr_config.c: Fix GT domain TDC current ... Alder Lake-S 2+0 SKUs and 35W SKUs have 20A GT TDC, all other Alder Lake-S SKUs have GT TDC of 22A. Based on the default settings of ADL-S FSP. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Ie6851d322fc9354d019a76503c3d35b5e6eca48b Reviewed-on: https://review.coreboot.org/c/coreboot/+/72998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>		2023-06-14 21:16:15 +00:00
..
alderlake	soc/intel/alderlake/vr_config.c: Fix GT domain TDC current	2023-06-14 21:16:15 +00:00
apollolake	soc/intel/apollolake: Switch to snake case for SataPortsEnable	2023-06-02 17:58:46 +00:00
baytrail	soc/intel: Clean up some includes	2023-05-10 21:27:29 +00:00
braswell	soc/intel: Clean up some includes	2023-05-10 21:27:29 +00:00
broadwell	soc/intel: Clean up some includes	2023-05-10 21:27:29 +00:00
cannonlake	soc/intel/cannonlake: Allow SoC to choose CAR mode (eNEM/NEM)	2023-04-14 14:45:12 +00:00
common	soc/intel/common: Make get_ramtop_addr non static	2023-06-07 22:00:47 +00:00
denverton_ns	sb,soc/amd,intel: Sync FADT entries visually	2023-05-10 21:26:55 +00:00
elkhartlake	soc/intel/elkhartlake: Make PCIe root port max payload size configurable	2023-05-24 11:25:24 +00:00
jasperlake	soc/intel/jasperlake: Enable early caching of RAMTOP region	2023-06-01 19:00:03 +00:00
meteorlake	soc/intel/meteorlake: Fill PCI SSID parameters	2023-06-06 12:15:58 +00:00
skylake	soc/intel: Move USB PORTSC definition into IA common code	2023-03-26 19:44:15 +00:00
tigerlake	soc/intel/tgl: Unhide PMC, IOM ACPI devices from OS	2023-05-01 14:47:04 +00:00
xeon_sp	soc/intel/xeon_sp: Fix HEST table length	2023-06-14 09:53:57 +00:00
Makefile.inc