Michael Niewöhner 310c7637da soc/intel: deduplicate ACPI timer emulation ... The code for enabling ACPI timer emulation is the same for the SoCs SKL, CNL, ICL, TGL, JSL and EHL. Deduplicate it by moving it to common code. APL differs in not having the delay settings. However, the bits are marked as "spare" and BWG mentions there are no "reserved bit checks done". Thus, we can write them unconditionally without any effect. Note: The ACPI timer emulation can only be used by SoCs with microcode supporting CTC (Common Timer Copy) / ACPI timer emulation. Change-Id: Ied4b312b6d53e80e71c55f4d1ca78a8cb2799793 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45951 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2020-10-28 21:28:19 +00:00
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amd	soc/amd/picasso/acpi: Include platform.asl	2020-10-28 17:17:38 +00:00
cavium	soc/cavium: Drop unneeded empty lines	2020-09-22 17:14:49 +00:00
intel	soc/intel: deduplicate ACPI timer emulation	2020-10-28 21:28:19 +00:00
mediatek	soc/mediatek/mt8192: update descriptions for dram config	2020-10-26 03:04:37 +00:00
nvidia	soc/nvidia: Drop unneeded empty lines	2020-09-22 17:14:59 +00:00
qualcomm	sc7180: enable RECOVERY_MRC_CACHE	2020-10-23 06:05:22 +00:00
rockchip	soc/rockchip/rk3288/include/soc/display.h: Add missing includes	2020-10-19 07:12:07 +00:00
samsung	src/soc/samsung: Move common headers to "common/include/soc"	2020-10-19 07:11:32 +00:00
sifive	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ti	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00