Marshall Buschman 314f4a2077 Port persimmon r6591 to e350m1: ROM cache early ... Enable rom cache early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2011-06-04 15:47:05 +00:00
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arch/x86	We don't have pausing versions of single-IO instructions.	2011-05-23 22:48:13 +00:00
boot	more ifdef -> if fixes.	2011-04-21 21:26:58 +00:00
console	Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an	2011-04-26 23:47:04 +00:00
cpu	Cosmetic cleanup.	2011-05-15 22:10:15 +00:00
devices	more ifdef -> if fixes	2011-04-21 20:45:45 +00:00
drivers	Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an	2011-04-26 23:47:04 +00:00
ec	Thinkpad: Enable Battery events	2011-04-28 09:29:06 +00:00
include	Correct wrong PCI ID for VIA K8M890 Chrome.	2011-06-03 19:46:25 +00:00
lib	Change read_option() to a macro that wraps some API uglyness	2011-05-10 21:53:13 +00:00
mainboard	Port persimmon r6591 to e350m1: ROM cache early	2011-06-04 15:47:05 +00:00
northbridge	This patch sets max freq defaults for ddr2 and ddr3for fam10.	2011-06-03 19:59:52 +00:00
pc80	Change read_option() to a macro that wraps some API uglyness	2011-05-10 21:53:13 +00:00
southbridge	vt8237r: Simplify bootblock init to work around nested if() romcc problem	2011-06-04 15:40:12 +00:00
superio	some ifdef --> if fixes	2011-04-21 20:24:43 +00:00
vendorcode	trivial remove blanks at the end of line	2011-06-01 02:00:30 +00:00
Kconfig	Add option 'compress ramstage'	2011-05-02 19:53:04 +00:00
Kconfig.deprecated_options	some ifdef --> if fixes	2011-04-21 20:24:43 +00:00