a0b366d550
The simple PCI config accessors are always available under names pci_s_[read|write]_configX. We have some use for PCI bridge configurations and resets in romstages, so expose them. Change-Id: Ia97a4e1f1b4c80b3dae800d80615bdc118414ed3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
134 lines
4.1 KiB
C
134 lines
4.1 KiB
C
/*
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* PCI defines and function prototypes
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* Copyright 1994, Drew Eckhardt
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* Copyright 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*
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* For more information, please consult the following manuals (look at
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* http://www.pcisig.com/ for how to get them):
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*
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* PCI BIOS Specification
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* PCI Local Bus Specification
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* PCI to PCI Bridge Specification
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* PCI System Design Guide
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*/
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#ifndef PCI_H
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#define PCI_H
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#if CONFIG(PCI)
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#include <stdint.h>
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#include <stddef.h>
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#include <device/pci_def.h>
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#include <device/resource.h>
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#include <device/device.h>
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#include <device/pci_ops.h>
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#include <device/pci_rom.h>
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#include <device/pci_type.h>
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/* Common pci operations without a standard interface */
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struct pci_operations {
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/* set the Subsystem IDs for the PCI device */
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void (*set_subsystem)(struct device *dev, unsigned int vendor,
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unsigned int device);
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void (*set_L1_ss_latency)(struct device *dev, unsigned int off);
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};
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struct pci_driver {
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const struct device_operations *ops;
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unsigned short vendor;
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unsigned short device;
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const unsigned short *devices;
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};
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struct msix_entry {
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union {
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struct {
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u32 lower_addr;
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u32 upper_addr;
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};
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struct {
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u64 addr;
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};
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};
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u32 data;
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u32 vec_control;
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};
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#if ENV_RAMSTAGE
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#define __pci_driver __attribute__((used, __section__(".rodata.pci_driver")))
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#else
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#define __pci_driver __attribute__((unused))
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#endif
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/** start of compile time generated pci driver array */
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extern struct pci_driver _pci_drivers[];
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/** end of compile time generated pci driver array */
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extern struct pci_driver _epci_drivers[];
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/* Set Subsystem ID operation for PCI devices */
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extern struct pci_operations pci_dev_ops_pci;
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extern struct device_operations default_pci_ops_dev;
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extern struct device_operations default_pci_ops_bus;
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void pci_dev_read_resources(struct device *dev);
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void pci_bus_read_resources(struct device *dev);
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void pci_dev_set_resources(struct device *dev);
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void pci_dev_enable_resources(struct device *dev);
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void pci_bus_enable_resources(struct device *dev);
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void pci_bus_reset(struct bus *bus);
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struct device *pci_probe_dev(struct device *dev, struct bus *bus,
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unsigned int devfn);
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void do_pci_scan_bridge(struct device *dev,
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void (*do_scan_bus)(struct bus *bus,
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unsigned int min_devfn, unsigned int max_devfn));
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void pci_scan_bridge(struct device *bus);
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void pci_scan_bus(struct bus *bus, unsigned int min_devfn,
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unsigned int max_devfn);
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uint8_t pci_moving_config8(struct device *dev, unsigned int reg);
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uint16_t pci_moving_config16(struct device *dev, unsigned int reg);
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uint32_t pci_moving_config32(struct device *dev, unsigned int reg);
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struct resource *pci_get_resource(struct device *dev, unsigned long index);
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void pci_dev_set_subsystem(struct device *dev, unsigned int vendor,
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unsigned int device);
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void pci_dev_init(struct device *dev);
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unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev);
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const char *pin_to_str(int pin);
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int get_pci_irq_pins(struct device *dev, struct device **parent_bdg);
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void pci_assign_irqs(struct device *dev, const unsigned char pIntAtoD[4]);
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const char *get_pci_class_name(struct device *dev);
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const char *get_pci_subclass_name(struct device *dev);
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size_t pci_msix_table_size(struct device *dev);
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int pci_msix_table_bar(struct device *dev, u32 *offset, u8 *idx);
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struct msix_entry *pci_msix_get_table(struct device *dev);
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#define PCI_IO_BRIDGE_ALIGN 4096
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#define PCI_MEM_BRIDGE_ALIGN (1024*1024)
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#define PCI_ID(VENDOR_ID, DEVICE_ID) \
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((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
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pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev);
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pci_devfn_t pci_locate_device_on_bus(unsigned int pci_id, unsigned int bus);
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void pci_s_assert_secondary_reset(pci_devfn_t p2p_bridge);
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void pci_s_deassert_secondary_reset(pci_devfn_t p2p_bridge);
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void pci_s_bridge_set_secondary(pci_devfn_t p2p_bridge, u8 secondary);
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int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);
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static inline int pci_base_address_is_memory_space(unsigned int attr)
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{
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return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY;
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}
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#endif /* CONFIG_PCI */
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void pci_early_bridge_init(void);
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#endif /* PCI_H */
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