Bora Guvendik 33117ec601 soc/intel/apollolake: Use ITSS common code ... This patch uses common ITSS library to setup itss irq. Change-Id: Id265505cfc106668aea25ad93e114fe20736b700 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/19236 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-04-28 16:30:57 +02:00
..
acpi	src/acpi: Capitalize ACPI and SATA	2016-07-31 19:25:40 +02:00
arch	arch/x86: Add read64 and write64 functions	2017-04-25 06:14:39 +02:00
commonlib	include: Add xmalloc, xzmalloc and dma routines	2017-04-25 00:52:03 +02:00
console	console: rework log level to not be reliant on ROMSTAGE_CONST	2017-04-25 18:13:56 +02:00
cpu	nb/amd/amdk8: Link raminit_f.c	2017-04-27 10:18:28 +02:00
device	x86/acpi: Use initialized VBIOS in VFCT table	2017-04-27 18:17:57 +02:00
drivers	drivers/intel/fsp2_0: add option to incorporate platform memory version	2017-04-28 15:56:49 +02:00
ec	ec/roda/it8518: Do EC write manually with long timeout	2017-04-08 13:17:56 +02:00
include	AMD Geode: Move conflicting mainboard_romstage_entry()	2017-04-25 22:39:05 +02:00
lib	cbmem_console: Document known reimpementations of console structure/API	2017-04-26 01:31:51 +02:00
mainboard	google/gru: tpm on bob: cr50: add irq clear/irq status for tpm irq	2017-04-28 06:49:18 +02:00
northbridge	cpu/amd/pi: Change wrapper to use config option	2017-04-27 18:52:00 +02:00
soc	soc/intel/apollolake: Use ITSS common code	2017-04-28 16:30:57 +02:00
southbridge	amd/pi/hudson: Add VBNV cmos reset option	2017-04-27 17:09:08 +02:00
superio	superio/fintek: Add support for Fintek F71808A	2017-03-27 19:19:56 +02:00
vboot	Remove libverstage as separate library and source file class	2017-03-28 22:18:53 +02:00
vendorcode	Kconfig: provide MAINBOARD_HAS_TPM_CR50 option	2017-04-24 22:02:55 +02:00
Kconfig	include: Add xmalloc, xzmalloc and dma routines	2017-04-25 00:52:03 +02:00