coreboot-kgpe-d16/src/mainboard/intel/adlrvp
Sridhar Siricilla 344a1bd43c mb/intel/adlrvp: Configure GPIOs to enable DMIC
The patch configures GPIO pins to enable DMIC.

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I2907737071f7d6b3c88c492d90edf8455d1fa50a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
2020-11-07 08:56:05 +00:00
..
spd
variants mb/intel/adlrvp: Configure GPIOs to enable DMIC 2020-11-07 08:56:05 +00:00
board_id.c
board_id.h
board_info.txt
bootblock.c
chromeos.c
chromeos.fmd
dsdt.asl mb/intel/adlrvp: Add ADL-P mainboard ASL code 2020-10-14 14:49:09 +00:00
ec.c mb/intel/adlrvp: Add ADL-P ramstage mainboard code 2020-10-14 14:49:01 +00:00
Kconfig mb/intel: Enable ALC711 Audio codec over SNDW0 link 2020-11-07 08:55:53 +00:00
Kconfig.name
mainboard.c mb/intel/adlrvp: Add ADL-P ramstage mainboard code 2020-10-14 14:49:01 +00:00
Makefile.inc mb/intel/adlrvp: Add ADL-P ramstage mainboard code 2020-10-14 14:49:01 +00:00
romstage_fsp_params.c mb/intel/adlrvp: Add support for DDR5 memory 2020-11-05 07:29:44 +00:00
smihandler.c mb/intel/adlrvp: Add ADL-P ramstage mainboard code 2020-10-14 14:49:01 +00:00