Tom Warren 355dc1e66a nvidia/tegra: expose more registers ... This is in preparation for t210 Change-Id: I3e640b1f7fc583518361527dec4c3c1072c80251 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e762d4bde1a18691257453e4b87a0bb42a0a2d7c Original-Change-Id: Ida096106bb0137c07ad62d2df06628e37f0d884c Original-Signed-off-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/272754 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10632 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)		2015-06-23 22:58:32 +02:00
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acpi	acpi/sata: add generic sata ssdt port generator	2015-06-07 01:24:47 +02:00
arch	acpi: bring back ability to link DSDT into ramstage	2015-06-23 21:19:02 +02:00
console
cpu	cpu: x86 port to 64bit	2015-06-20 18:16:54 +02:00
device	ddr3: add missing newline	2015-06-23 01:50:33 +02:00
drivers	lenovo: Hide SMBIOS config	2015-06-11 13:20:56 +02:00
ec	lenovo: Move pc_keyboard_init to h8 init.	2015-05-29 07:45:55 +02:00
include	AMD Merlin Falcon: Add northbridge files for new AMD processor	2015-06-22 22:27:31 +02:00
lib	stage_cache: use cbmem init hooks	2015-06-09 22:06:40 +02:00
mainboard	southbridge/intel: Create common IFD Kconfig and Makefile	2015-06-23 22:48:45 +02:00
northbridge	Kconfig: Move CBFS_SIZE into Mainboard menu	2015-06-23 09:42:44 +02:00
soc	nvidia/tegra: expose more registers	2015-06-23 22:58:32 +02:00
southbridge	southbridge/intel: Create common IFD Kconfig and Makefile	2015-06-23 22:48:45 +02:00
superio	superio: use common x86 code on x86-64	2015-06-22 07:36:09 +02:00
vendorcode	vendorcode: Use cross archiver for libagesa.a on AMD f14	2015-06-23 22:27:52 +02:00
Kconfig	southbridge/intel: Create common IFD Kconfig and Makefile	2015-06-23 22:48:45 +02:00