coreboot-kgpe-d16/src/mainboard/amd/persimmon
Jens Rottmann 384ee9f142 Persimmon: drop useless DDR3 voltage code copied from Inagua
Inagua can use GPIOs 178,179 to switch VMEM to 1.5, 1.35 or 1.25 V,
which it does according to data read from the SO-DIMM's SPD EEPROM.

On Persimmon (according to DB-FT1 rev. D schematics) both GPIOs are
unconnected, there is no way to change the 1.5 V DDR3 voltage (save
unsoldering a resistor). The whole code copied over from Inagua is
useless.

Removed the code, instead a comment hints at Inagua, for people who do designs
based on Persimmon but do have a way to change VMEM.

The line ...->DDR3Voltage = VOLT1_5; is supposed to make the AGESA DDR3 code
select the RAM timings for the actually supplied voltage instead of the
hoped-for but unavailable lower voltage. I have no idea how to test this, but
in any case it can't hurt.

Change-Id: Id098e09418b665645814a6ee2d41a3bff72238ba
Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-on: http://review.coreboot.org/2448
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-02-18 22:49:59 +01:00
..
acpi AMD SB800: Interrupt routine for PCI slots on Persimmon 2012-11-30 20:05:59 +01:00
acpi_tables.c Refactor some alignment handling 2012-04-20 21:18:02 +02:00
agesawrapper.c Fix typo on Persimmon #if CONFIG_HAVE_ACPI_RESUME 2012-05-25 21:24:19 +02:00
agesawrapper.h S3 code in the mainboard. 2012-04-16 18:26:21 +02:00
BiosCallOuts.c Persimmon: drop useless DDR3 voltage code copied from Inagua 2013-02-18 22:49:59 +01:00
BiosCallOuts.h Persimmon: adapt PCIe reset code copied from Inagua to actually match Persimmon 2013-02-18 22:49:38 +01:00
buildOpts.c S3 code in the mainboard. 2012-04-16 18:26:21 +02:00
cmos.layout Cleanup Persimmon mainboard whitespace. 2011-11-08 19:01:43 +01:00
devicetree.cb sconfig: rename lapic_cluster -> cpu_cluster 2013-02-14 07:07:20 +01:00
dimmSpd.c Cleanup Persimmon mainboard whitespace. 2011-11-08 19:01:43 +01:00
dimmSpd.h Cleanup Persimmon mainboard whitespace. 2011-11-08 19:01:43 +01:00
dsdt.asl AMD boards, ASRock E350M1: Remove whitespace in front of comma in DSDT 2013-01-26 19:26:30 +01:00
get_bus_conf.c Clean up #ifs 2012-05-08 00:34:34 +02:00
irq_tables.c Persimmon updates for AMD F14 rev C0 2011-09-16 01:51:00 +02:00
Kconfig Drop CONFIG_HAVE_BUS_CONFIG, clean up Kconfig 2012-11-16 01:11:16 +01:00
mainboard.c Persimmon: Disable the unused GPP PCIe clocks 2012-11-20 23:59:54 +01:00
Makefile.inc Change AMD vendorcode build 2011-12-02 08:59:26 +01:00
mptable.c Clean up #ifs 2012-05-08 00:34:34 +02:00
OptionsIds.h Persimmon updates for AMD F14 rev C0 2011-09-16 01:51:00 +02:00
platform_cfg.h Persimmon: Disable the unused PCI clocks 2012-11-30 20:04:24 +01:00
PlatformGnbPcie.c Persimmon: adapt PCIe reset code copied from Inagua to actually match Persimmon 2013-02-18 22:49:38 +01:00
PlatformGnbPcieComplex.h Persimmon: disable APU PCIe port 3 2013-02-18 22:49:45 +01:00
reset.c Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8. 2011-02-14 19:04:45 +00:00
romstage.c Clean up #ifs 2012-05-08 00:34:34 +02:00