8c678cf46a
Tested on Elgon EVT board and boots into GNU/Linux. TODO: * Add hard reset function for VBOOT. * Add EC code * Add SPI flash write protection Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/28024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
1.9 KiB
1.9 KiB
Elgon
This page describes how to run coreboot on the Elgon compute board from OpenCellular.
TODO
- Add hard reset control
Flashing coreboot
+---------------------+------------+
| Type | Value |
+=====================+============+
| Socketed flash | no |
+---------------------+------------+
| Model | W25Q128 |
+---------------------+------------+
| Size | 16 MiB |
+---------------------+------------+
| In circuit flashing | yes |
+---------------------+------------+
| Package | SOIC-8 |
+---------------------+------------+
| Write protection | No |
+---------------------+------------+
| Dual BIOS feature | No |
+---------------------+------------+
| Internal flashing | yes |
+---------------------+------------+
Internal programming
The SPI flash can be accessed using flashrom.
External programming
The EVT board does have a pinheader to flash the SOIC-8 in circuit. Directly connecting a Pomona test-clip on the flash is also possible.
TODO: pinout
Total board view of EVT
Closeup view of SOIC-8 flash IC, programming pin header and USB serial connector of EVT
Technology
+---------------+----------------------------------------+
| SoC | :doc:`../../soc/cavium/cn81xx/index` |
+---------------+----------------------------------------+
| CPU | Cavium ARMv8-Quadcore `CN81XX`_ |
+---------------+----------------------------------------+
.. _CN81XX: https://www.cavium.com/product-octeon-tx-cn80xx-81xx.html