coreboot-kgpe-d16/src
Angel Pons 3e314636a6 soc/intel/skylake/cpu.c: Fix comment coding style
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Change-Id: Idf6d0ea69a08e378266b4256c476580889adfca8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46428
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-14 20:44:13 +00:00
..
acpi acpi/device: Add GPIO binding property for an array of GPIOs 2020-10-14 05:43:00 +00:00
arch sc7180: Enable bootblock compression 2020-10-13 22:41:19 +00:00
commonlib src/commonlib: Drop unneeded empty lines 2020-09-21 15:53:25 +00:00
console src: Rename EM100Pro-specific SPI console Kconfig option 2020-10-13 08:40:52 +00:00
cpu haswell/lynxpoint: Align cosmetics with Broadwell 2020-10-14 08:37:36 +00:00
device pci_device: Add a helper function for determining if PCI device is wake source 2020-10-11 02:13:17 +00:00
drivers drivers: snsn65dsi86: Fix link rate parsing 2020-10-13 22:41:05 +00:00
ec src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM) 2020-10-14 05:37:40 +00:00
include lib and libpayload: add 64-bit versions of clz, __ffs and log2 2020-10-14 15:24:59 +00:00
lib lib/cbfs: deserialize cbfs_stage objects correctly 2020-10-13 08:28:14 +00:00
mainboard mb/google/volteer: Disable HybridStorageMode for volteer baseboard 2020-10-14 16:46:17 +00:00
northbridge nb/intel/x4x: Place raminit definitions in raminit.h 2020-10-14 09:19:22 +00:00
security security/intel/txt: Add and use DPR register layout 2020-10-12 08:52:58 +00:00
soc soc/intel/skylake/cpu.c: Fix comment coding style 2020-10-14 20:44:13 +00:00
southbridge haswell/lynxpoint: Align cosmetics with Broadwell 2020-10-14 08:37:36 +00:00
superio superio/nuvoton/common: Collapse two if statements 2020-10-13 17:16:19 +00:00
vendorcode vc/intel/fsp/fsp2_0/adl: Update FSP header to version 1332.01 2020-10-14 03:38:49 +00:00
Kconfig src: Rename EM100Pro-specific SPI console Kconfig option 2020-10-13 08:40:52 +00:00