Kyösti Mälkki 3f22abb0a7 intel/haswell post-car: Minor fix on MTRR setting ... Change-Id: I65f0ad430bdcc2065c1e873743da04201a68d9c9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15796 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-07-23 19:10:21 +02:00
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acpi	arch/x86: provide common Intel ACPI hardware definitions	2016-07-15 08:31:21 +02:00
arch	arch/riscv: Enable unaligned load handling	2016-07-19 20:22:25 +02:00
commonlib	cbmem: share additional time stamps IDs	2016-07-20 22:09:24 +02:00
console	console/post: be explicit about conditional cmos_post_log() compiling	2016-05-25 18:04:11 +02:00
cpu	intel/haswell post-car: Minor fix on MTRR setting	2016-07-23 19:10:21 +02:00
device	device: i2c: Add support for I2C bus operations	2016-06-09 17:05:40 +02:00
drivers	drivers/intel/fsp2_0: Split reset handling logic	2016-07-19 21:03:03 +02:00
ec	ec/google/chromeec: provide common SMI handler helpers	2016-07-15 08:35:29 +02:00
include	soc/intel/common: Add reset_prepare() for common reset	2016-07-19 20:20:13 +02:00
lib	tpm2_tlcl: Use signed integer for tpm2_marshal_command return value	2016-07-20 17:08:52 +02:00
mainboard	intel/amenia: Write protect GPIO relative to bank offset	2016-07-22 18:59:36 +02:00
northbridge	nb/intel/x4x: Fix CAS latency detection	2016-07-19 18:55:50 +02:00
soc	soc/intel/apollolake: Correct the gpio bank irq	2016-07-22 18:57:48 +02:00
southbridge	timestamp: Drop duplicate TS_END_ROMSTAGE entries	2016-07-21 15:36:00 +02:00
superio	sio/winbond/w83667hg-a: Add pinmux defines for UART B	2016-05-29 19:34:54 +02:00
vendorcode	amd/agesa/f16kb: Allow SATA Gen3	2016-07-22 18:56:42 +02:00
Kconfig	Romstage spinlocks require EARLY_CBMEM_INIT	2016-07-10 04:03:31 +02:00