..
dram
Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED()
2015-07-12 18:14:23 +02:00
azalia.h
Remove address from GPLv2 headers
2015-05-21 20:50:25 +02:00
azalia_device.h
Remove address from GPLv2 headers
2015-05-21 20:50:25 +02:00
cardbus.h
device/{cardbus,agp}.h: Missing header for device_t type
2014-06-25 11:32:23 +02:00
device.h
Move remap_bsp_lapic to AMD specific code
2015-06-13 21:06:52 +02:00
drm_dp_helper.h
FUI: reorganize include files
2013-07-10 02:39:42 +02:00
early_smbus.h
Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED()
2015-07-12 18:14:23 +02:00
hypertransport.h
AMD K8 fam10: Drop extra HT scan_chain() parameters
2015-06-05 10:19:02 +02:00
hypertransport_def.h
AMD K8 fam10: Refactor offset_unitid configuration
2015-02-20 07:04:00 +01:00
i2c.h
Remove address from GPLv2 headers
2015-05-21 20:50:25 +02:00
path.h
sconfig: rename lapic_cluster -> cpu_cluster
2013-02-14 07:07:20 +01:00
pci.h
devicetree: Change scan_bus() prototype in device ops
2015-06-04 11:22:53 +02:00
pci_def.h
PCI - Add interrupt disable bit definition
2015-04-10 20:10:55 +02:00
pci_ehci.h
Remove address from GPLv2 headers
2015-05-21 20:50:25 +02:00
pci_ids.h
AMD Merlin Falcon: Add northbridge files for new AMD processor
2015-06-22 22:27:31 +02:00
pci_ops.h
pci_ops.{c,h}: Don't hide pointers behind typedefs
2014-11-05 14:45:57 +01:00
pci_rom.h
Unify byte order macros and clrsetbits
2015-04-21 08:23:25 +02:00
pciexp.h
devicetree: Change scan_bus() prototype in device ops
2015-06-04 11:22:53 +02:00
pcix.h
devicetree: Change scan_bus() prototype in device ops
2015-06-04 11:22:53 +02:00
pnp.h
superio: Replace the indexed I/O functions
2015-05-14 20:49:24 +02:00
pnp_def.h
pnp: Allow setting of misc register 0xf4 in device tree
2014-09-17 17:34:16 +02:00
resource.h
resource: Refactor IORESOURCE flags use
2015-06-10 05:51:51 +02:00
smbus.h
Cosmetics and coding style fixes in devices/*.
2010-10-18 00:00:57 +00:00
smbus_def.h
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