coreboot-kgpe-d16/src/soc/intel/alderlake/dptf.c
Sumeet R Pawnikar a2a90a3157 soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC
Add DPTF HIDs for thermal funcitonality for Alder Lake SoC.

BRANCH=None
BUG=None
TEST=Built and tested on adlrvp board

Change-Id: I8de58497fa800690d04abbdfe4d6abf1c0184334
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52268
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-23 14:46:33 +00:00

18 lines
532 B
C

/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/dptf/dptf.h>
static const struct dptf_platform_info adl_dptf_platform_info = {
.use_eisa_hids = false,
/* _HID for the toplevel DPTF device, typically \_SB.DPTF */
.dptf_device_hid = "INTC1041",
/* _HID for Intel DPTF Generic Device (these require PTYP as well) */
.generic_hid = "INTC1046",
/* _HID for Intel DPTF Fan Device */
.fan_hid = "INTC1048",
};
const struct dptf_platform_info *get_dptf_platform_info(void)
{
return &adl_dptf_platform_info;
}