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coreboot-kgpe-d16/src/soc/intel/baytrail
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Aaron Durbin 43b7db7df0 baytrail: fix HAVE_REFCODE_BLOB build errors 
When building HAVE_REFCODE_BLOB there are a couple of errors. One
is a failure building !CHROME_OS. The other is from a header
change where console_tx_byte() was declared.

Change-Id: Ia912902e8276d13b8e1716aa16c57b111579a03d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9141
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@google.com>
2015-03-30 22:06:09 +02:00
..
acpi acpi: Generate valid ACPI processor objects 2015-02-16 21:02:30 +01:00
baytrail coreboot: fix munged license text 2015-03-09 02:32:19 +01:00
bootblock coreboot: fix munged license text 2015-03-09 02:32:19 +01:00
microcode baytrail: update C0 microcode 2014-10-01 23:30:05 +02:00
romstage x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
acpi.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
chip.c {cpu,soc}: Use DEVICE_NOOP macro over dummy symbol 2014-11-01 21:14:35 +01:00
chip.h baytrail: use the setting in devicetree.cb to config USBPHY_COMPBG 2015-01-16 20:50:21 +01:00
cpu.c baytrail: Configure MSR for 2-core and 4-core P-state configutation 2014-10-28 17:57:12 +01:00
dptf.c bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
ehci.c baytrail: there is a chance that USBPHY_COMPBG is set to 0 2015-01-16 20:50:40 +01:00
elog.c rambi/baytrail: ACPI, GPIO, audio, misc updates 2014-09-18 01:23:14 +02:00
emmc.c baytrail: Put devices in ACPI mode after setup 2014-05-12 22:08:22 +02:00
gfx.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
gpio.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
hda.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
iosf.c coreboot: fix munged license text 2015-03-09 02:32:19 +01:00
Kconfig soc/intel/baytrail/Kconfig: Remove explicit HAVE_MONOTONIC_TIMER 2015-02-25 16:21:23 +01:00
lpe.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
lpss.c baytrail: Put devices in ACPI mode after setup 2014-05-12 22:08:22 +02:00
Makefile.inc Update hex values to CBFS binary name types in Makefiles 2015-03-30 21:47:15 +02:00
memmap.c coreboot: fix munged license text 2015-03-09 02:32:19 +01:00
northcluster.c intel/baytrail: Spelling fixes 2014-12-08 05:40:24 +01:00
pcie.c intel/baytrail: Spelling fixes 2014-12-08 05:40:24 +01:00
perf_power.c bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
placeholders.c baytrail: Add ACPI CPU entries 2014-05-06 18:39:04 +02:00
pmutil.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
ramstage.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00
refcode.c baytrail: fix HAVE_REFCODE_BLOB build errors 2015-03-30 22:06:09 +02:00
reset.c
sata.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
scc.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
sd.c baytrail: Add support for LPSS and SCC devices in ACPI mode 2014-05-10 06:30:36 +02:00
smihandler.c intel/baytrail: Spelling fixes 2014-12-08 05:40:24 +01:00
smm.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
southcluster.c bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
spi.c bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
stage_cache.c baytrail: allow ramstage_cache_location() usage in ramstage 2014-05-10 06:31:52 +02:00
tsc_freq.c intel/baytrail: Spelling fixes 2014-12-08 05:40:24 +01:00
xhci.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00