coreboot-kgpe-d16/src
Felix Held 43cd1c0bbe soc/amd/common/block/pm: rework pm_set_power_failure_state
Picasso and Stoneyridge didn't do a read-modify-write operation on the
lower nibble of PM_RTC_SHADOW_REG, but just wrote the upper nibble as
all zeros. Since the upper nibble might be uninitialized before the
lower nibble gets written, do what Picasso and Stoneyridge did here
instead of what the reference code does. Also add a comment why and how
this register behaves a bit weird.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0bda2349e3ae84cba50b187cc773fd8a5b17f4e2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52301
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-04-14 18:45:39 +00:00
..
acpi ACPI: Add SATC structure for DMAR table 2021-03-28 16:03:21 +00:00
arch arch/x86: Provide readXp/writeXp helpers in arch/mmio.h 2021-04-06 07:10:40 +00:00
commonlib cbfs: mcache: Fix size calculation for perfectly full cache 2021-04-10 00:00:34 +00:00
console Rename do_printk() to printk() 2021-04-14 10:38:09 +00:00
cpu cpu/intel/haswell: Use new fixed BAR accessors 2021-04-10 16:04:59 +00:00
device Rename do_printk() to printk() 2021-04-14 10:38:09 +00:00
drivers intel: mma: Use new CBFS API 2021-04-14 01:03:33 +00:00
ec chromeec: make ssfc optional in fw_config 2021-04-12 17:11:40 +00:00
include Rename do_printk() to printk() 2021-04-14 10:38:09 +00:00
lib decompressor: Add CBFS_VERIFICATION support 2021-04-06 07:49:15 +00:00
mainboard mb/google/brya: Enable CSE Lite SKU 2021-04-14 15:59:23 +00:00
northbridge nb/intel/x4x: Refactor sync DLL programming (part 2) 2021-04-12 20:42:08 +00:00
security vboot: ec_sync: Switch to new CBFS API 2021-04-14 01:03:22 +00:00
soc soc/amd/common/block/pm: rework pm_set_power_failure_state 2021-04-14 18:45:39 +00:00
southbridge sb/amd/pi/hudson: remove unused Bolton PI FCH code 2021-04-11 21:06:29 +00:00
superio acpi/acpigen.h: Add more intuitive AML package closing functions 2021-03-22 11:21:55 +00:00
vendorcode vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v4043 2021-04-10 00:55:13 +00:00
Kconfig southbridge: Ensure common Kconfig gets included last 2021-02-18 10:11:39 +00:00