Sridhar Siricilla 61dd05e010 soc/intel/alderlake: Enable CSE Lite driver for ADL platform in romstage ... This patch sets up cse_fw_sync() call in the romstage. The cse_fw_sync() must be called after DRAM initialization. Test=Verified on Alderlake platform Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I6779f4a9e140deebf7f3cecd9fc5dac18813f246 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51441 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2021-03-17 08:01:14 +00:00
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amd	cbfs: Remove prog_locate() for stages and rmodules	2021-03-16 21:45:34 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	arch/x86: Move prologue to .init section	2021-01-07 11:02:03 +00:00
intel	soc/intel/alderlake: Enable CSE Lite driver for ADL platform in romstage	2021-03-17 08:01:14 +00:00
mediatek	vendorcode/mt8192: devapc: fix register offset for PCIe domain	2021-03-17 00:33:27 +00:00
nvidia	src: Remove useless comments in "includes" lines	2021-02-04 10:18:49 +00:00
qualcomm	cbfs: Remove prog_locate() for payloads (SELF and FIT)	2021-03-17 00:13:53 +00:00
rockchip	soc/rockchip/rk3399/sdram: Add channel to error message	2021-03-04 01:22:10 +00:00
samsung	cbfs: Pull handling of the CBFS_CACHE mem_pool into CBFS core	2021-03-08 22:31:29 +00:00
sifive	memlayout: Store region sizes as separate symbols	2021-02-19 08:39:26 +00:00
ti	soc/ti/am335x/header.c: Add missing include	2021-02-03 08:55:15 +00:00
ucb