Lee Leahy 4dd34eee09 soc/intel/quark: Add USB PHY initialization ... Add register access support using register scripts. Initialize the USB PHY using register scripts. TEST=Build and run on Galileo Gen2 Change-Id: I34a8e78eab3c7314ca34343eccc8aeef0622798a Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/14496 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>		2016-05-04 22:36:53 +02:00
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acpi	acpi/: add missing license header	2016-01-14 22:52:11 +01:00
arch	arch/x86: Drop CBFS_BASE_ADDRESS	2016-05-03 11:41:55 +02:00
commonlib	ensure correct byte ordering for cbfs segment list	2016-04-25 23:30:00 +02:00
console	arch/x86: introduce postcar stage/phase	2016-03-23 14:24:30 +01:00
cpu	cpu/x86: combine multiprocessor and SMM initialization	2016-05-04 18:51:49 +02:00
device	payloads: add iPXE 'payload' build	2016-04-13 17:45:37 +02:00
drivers	drivers/xpowers: Switch to src/drivers/[X]/[Y]/ scheme	2016-05-04 22:14:44 +02:00
ec	kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ scheme	2016-04-19 18:34:18 +02:00
include	lib/reg_script: Add display support	2016-05-04 19:21:40 +02:00
lib	lib/reg_script: Add display support	2016-05-04 19:21:40 +02:00
mainboard	mainboard/intel/galileo: Enable I2C and GPIO	2016-05-03 22:53:41 +02:00
northbridge	nb/intel/sandybridge/raminit: support calling dram_freq multiple times	2016-05-04 19:59:02 +02:00
soc	soc/intel/quark: Add USB PHY initialization	2016-05-04 22:36:53 +02:00
southbridge	southbridge/amd: Drop HUDSON_FWM_INSIDE_CBFS	2016-05-03 11:41:07 +02:00
superio	superio/smsc/mec1308: Fix AddressMax value for SMBX mailbox	2016-04-13 23:39:28 +02:00
vendorcode	vendorcode/intel/fsp/fsp1_1/quark: Update FspUpdVpd.h	2016-05-03 22:53:20 +02:00
Kconfig	lib/coreboot_table: use the architecture dependent table size	2016-05-02 20:03:34 +02:00