coreboot-kgpe-d16/src/soc
huang lin 4f17374dfd rockchip: rk3399: add i2c clock driver
This patch add i2c clock driver and reuse the common
rockchip i2c driver.

The i2c0,4,8 src clock from ppll, while i2c1,2,3,5,6,7 from gpll.

Please refer to TRM V0.3 Part1 Page 142 for i2c clock setting.

BRANCH=none
BUG=chrome-os-partner:51537
TEST=emerge-kevin coreboot

Change-Id: I91822e483244d71798a1c68f14ba0a84f405a665
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 270118e44d159f6a27812fa234b34fe7ac54cbe4
Original-Change-Id: Iea5f4a93cf173e1278166dcb04e19a4ef6c4af04
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/338948
Reviewed-on: https://review.coreboot.org/14711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09 08:43:07 +02:00
..
broadcom/cygnus soc/*: fix uart's regwidth specification in cbtables 2016-02-21 12:26:05 +01:00
dmp/vortex86ex dmp/vortex86ex: Merge northbridge and southbridge into soc 2016-05-05 20:06:33 +02:00
imgtec/pistachio imgtec/pistachio: Fix memlayout ASSERT with new binutils 2016-04-21 07:16:06 +02:00
intel soc/intel/skylake: Enable another VR mailbox command for certain boards 2016-05-09 08:28:57 +02:00
marvell src/soc/marvell: Update license headers 2016-04-13 17:34:33 +02:00
mediatek/mt8173 soc/mediatek/mt8173: mt6391: vcore sleep voltage should be 0.7V 2016-05-09 08:36:57 +02:00
nvidia tegra124: Align the framebuffer's bytes-per-line to 32 2016-05-09 07:49:05 +02:00
qualcomm/ipq806x ipq806x/storm: Return NULL for cbmem_top if DRAM is not initialized 2016-03-29 22:37:01 +02:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip rockchip: rk3399: add i2c clock driver 2016-05-09 08:43:07 +02:00
samsung soc/*: fix uart's regwidth specification in cbtables 2016-02-21 12:26:05 +01:00
ucb/riscv tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00