Gaggery Tsai 517c5a8c54 soc/intel/alderlake: Add power state thresholds ... This patch adds power state 1/2/3 threshold setting interfaces and pass the settings to FSP. BUG=b:229803757 BRANCH=None TEST=Add psi1threshold and psi2threshold to overridetree.cb and enable FSP log to ensure the settings are incorrect. Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Change-Id: I0330ede4394ebc2d3d32e4b78297c3cb328660d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67463 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>		2022-09-20 08:00:18 +00:00
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amd	amd/mendocino/root_complex: Throttle SOC during low/no battery	2022-09-19 10:00:51 +00:00
cavium	soc/cavium,ti: Do resource transition	2022-06-29 11:55:01 +00:00
example/min86	src/mb: Add SPDX identifiers to files missing them	2022-08-11 17:52:19 +00:00
intel	soc/intel/alderlake: Add power state thresholds	2022-09-20 08:00:18 +00:00
mediatek	soc/mediatek: Use "if (!ptr)" in preference to "if (ptr == NULL)"	2022-09-14 12:49:44 +00:00
nvidia	timer: Change timer util functions to 64-bit	2022-09-14 11:55:39 +00:00
qualcomm	sc7180: Fix DDR training failure during warm reset with OTA	2022-09-13 13:05:46 +00:00
rockchip	soc/(amd|rockchip): Update vb2ex_hwcrypto implementations to new API req	2022-08-12 20:59:59 +00:00
samsung	timer: Change timer util functions to 64-bit	2022-09-14 11:55:39 +00:00
sifive/fu540	src/soc: Get rid of most src/soc/Kconfig files	2022-06-24 03:59:36 +00:00
ti	soc/cavium,ti: Do resource transition	2022-06-29 11:55:01 +00:00
ucb/riscv	src/soc: Get rid of most src/soc/Kconfig files	2022-06-24 03:59:36 +00:00