534e61c4e6
Some older gcc requires the default entry in switch, otherwise build warning "enumeration value not handled in switch" will come up. Change-Id: Ic8ea9960e4aca599e0ea62ec345122c9df57e766 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1501 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> |
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.. | ||
accessors | ||
cli | ||
cbfs.c | ||
cbfs.h | ||
ChangeLog | ||
cmos_lowlevel.c | ||
cmos_lowlevel.h | ||
cmos_ops.c | ||
cmos_ops.h | ||
common.c | ||
common.h | ||
compute_ip_checksum.c | ||
COPYING | ||
coreboot_tables.h | ||
DISCLAIMER | ||
hexdump.c | ||
hexdump.h | ||
input_file.c | ||
input_file.h | ||
ip_checksum.h | ||
layout.c | ||
layout.h | ||
lbtable.c | ||
lbtable.h | ||
Makefile | ||
Makefile.inc | ||
nvramtool.spec | ||
README | ||
reg_expr.c | ||
reg_expr.h |
Summary of Operation -------------------- nvramtool is a utility for reading/writing coreboot parameters and displaying information from the coreboot table. It is intended for x86-based systems (both 32-bit and 64-bit) that use coreboot. The coreboot table resides in low physical memory, and may be accessed through the /dev/mem interface. It is created at boot time by coreboot, and contains various system information such as the type of mainboard in use. It specifies locations in the CMOS (nonvolatile RAM) where the coreboot parameters are stored. For information about coreboot, see http://www.coreboot.org/. Ideas for Future Improvements ----------------------------- 1. Move the core functionality of this program into a shared library. 2. Consider adding options for displaying other BIOS-provided information such as the MP table, ACPI table, PCI IRQ routing table, etc.