Kyösti Mälkki 157b189f6b cpu/intel: Enter romstage without BIST ... When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>		2019-08-18 19:03:22 +00:00
..
acpi
acpi_tables.c
board_info.txt
cmos.default
cmos.layout
devicetree.cb	sb/intel/i82801gx: Detect if the southbridge supports AHCI	2019-06-06 10:38:22 +00:00
dsdt.asl
gpio.c
hda_verb.c
Kconfig	nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selection	2019-06-14 18:07:30 +00:00
Kconfig.name
mainboard.c	src: Use include <delay.h> when appropriate	2019-04-06 16:09:12 +00:00
Makefile.inc
mptable.c	intel/945 boards: Use smp_write_pci_intsrc()	2019-06-25 18:48:43 +00:00
romstage.c	cpu/intel: Enter romstage without BIST	2019-08-18 19:03:22 +00:00
smihandler.c	src: Use include <delay.h> when appropriate	2019-04-06 16:09:12 +00:00