coreboot-kgpe-d16/src
jiazi Yang 51fc93fb22 chromeec/acpi: add Tablet event and EC ACPI MEM
Switch DPTF table when TABLET/NOTEBOOK mode changes
1. EC send EC_HOST_EVENT_MODE_CHANGE(29/0x1D) when mode changes
2. Host read current "physical mode" from EC ERAM

BUG=chrome-os-partner:53526
BRANCH=master
TEST=build glados

Change-Id: I836d2b9d1a24c455c4b8d4b85f7edc19259d2f71
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 9506c4c07e0f713c9a22a0231bc4255f6876783f
Original-Change-Id: I5a3363ff9c958decb5aed1c85fc2a1ef6670931d
Original-Signed-off-by: jiazi Yang <Tomato_Yang@asus.com>
Original-Signed-off-by: Shasha Zhao <Sarah_Zhao@asus.com>
Original-Signed-off-by: jiazi Yang <Tomato_Yang@asus.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/365991
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16151
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-12 18:06:53 +02:00
..
acpi src/acpi: Capitalize ACPI and SATA 2016-07-31 19:25:40 +02:00
arch arch/riscv: Fix the page table setup code 2016-08-11 21:12:54 +02:00
commonlib commonlib/region: make buffer argument const for writeat 2016-08-08 18:34:17 +02:00
console console: Add write line routine 2016-08-10 22:30:19 +02:00
cpu Remove non-ascii & unprintable characters 2016-08-01 21:44:45 +02:00
device src/device: Capitalize CPU, RAM and ROM 2016-07-31 18:33:30 +02:00
drivers drivers/intel/fsp2_0: Fix FSP reset path 2016-08-12 03:36:45 +02:00
ec chromeec/acpi: add Tablet event and EC ACPI MEM 2016-08-12 18:06:53 +02:00
include console: Add write line routine 2016-08-10 22:30:19 +02:00
lib lib/timestamp: Add timestamps to CBMEM in POSTCAR stage 2016-08-04 03:27:08 +02:00
mainboard reef: Update chromeos.fmd 2016-08-11 22:43:29 +02:00
northbridge x4x: make preallocated IGD memory a cmos option 2016-08-09 10:43:03 +02:00
soc soc/apollolake: enable access to RTC NVRAM 2016-08-11 22:43:53 +02:00
southbridge chromeos chipsets: select RTC usage 2016-08-08 18:37:37 +02:00
superio superio/*: Relocate Kconfig to chip folder. 2016-08-09 10:38:30 +02:00
vboot src/vboot: Capitalize RAM and CPU 2016-07-31 19:31:41 +02:00
vendorcode vendorcode/intel/fsp: Add fsp 2.0 header files for skylake and kabylake 2016-08-11 20:49:48 +02:00
Kconfig superio/*: Relocate Kconfig to chip folder. 2016-08-09 10:38:30 +02:00