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Raul E Rangel 571e7f02de lib/prog_loaders, soc/amd/: Make payload_preload use cbfs_preload
Now that CBFS has this functionality built in, we no longer need to
manually code it.

payload_preload used to use the payload_preload_cache region to store
the raw payload contents. This region was placed outside the firmware
reserved region, so it was available for use by the OS. This was
possible because the payload isn't loaded again on S3 resume.

cbfs_preload only uses the cbfs_cache region. This region must be
reserved because it gets used on the S3 resume path. Unfortunately this
means that cbfs_cache must be increased to hold the payload. Cezanne is
the only platform currently using payload_preload, and the size of
cbfs_cache has already been adjusted.

In the future we could look into adding an option to cbfs_preload that
would allow it to use a different memory pool for the cache allocation.

BUG=b:179699789
TEST=Boot guybrush and verify preloading the payload was successful
CBFS DEBUG: get_preload_rdev(name='fallback/payload') preload successful

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Idc521b238620ff52b8ba481cd3c10e5c4f1394bd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58962
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-11-16 18:20:31 +00:00
3rdparty 3rdparty/amd_blobs: advance submodule pointer 2021-11-08 14:46:01 +00:00
Documentation Documentation/releases: Update index.md 2021-11-12 02:54:25 +00:00
LICENSES treewide: Remove trailing whitespace 2021-02-17 17:30:05 +00:00
configs configs/config.google_meep_cros: don't select ADD_FSP_BINARIES 2021-09-04 18:33:29 +00:00
payloads Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
spd spd: Add new LP5 parts and generate SPDs 2021-11-08 14:48:49 +00:00
src lib/prog_loaders, soc/amd/: Make payload_preload use cbfs_preload 2021-11-16 18:20:31 +00:00
tests arch/x86: Refactor the SMBIOS type 17 write function 2021-11-11 09:10:10 +00:00
util amdfwtool: Set soc name for Stoneyridge 2021-11-15 10:06:39 +00:00
.checkpatch.conf lint: checkpatch: Only exclude specific src/vendorcode/ subdirectories 2021-04-06 16:04:41 +00:00
.clang-format
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.gitignore .gitignore: Ignore .test/.dependencies globally 2020-10-31 18:21:36 +00:00
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MAINTAINERS MAINTAINERS: Add myself as a maintainer for ASUS A88XM-E 2021-11-01 15:57:35 +00:00
Makefile util/kconfig: Uprev to Linux 5.13's kconfig 2021-07-13 20:28:14 +00:00
Makefile.inc util/cse_serger: Add a new tool for stitching CSE components 2021-10-19 16:08:24 +00:00
README.md
gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
toolchain.inc build system: immediately report what users are supposed to look into 2021-10-18 16:39:25 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.