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coreboot-kgpe-d16/src/mainboard/intel/kblrvp
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Wim Vervoorn 57aa8e37dc mb/intel/kblrvp: Remove hex values from VR settings 
Change the hex values in the VR configuration tables of the Intel Kaby
Lake RVP boards to the same style that is used in the other mainboards.

Also, correct some numbers in the comment tables that did not match the register values.
The values in the tables haven't changed.

BUG=N/A
TEST=build

Change-Id: I77af544d7d88143e19abedb12a13627779c705c6
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37550
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-09 09:38:41 +00:00
..
acpi coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
spd mb/{asrock,intel,purism}: Copy channel arrays separately 2019-08-20 15:18:10 +00:00
variants mb/intel/kblrvp: Remove hex values from VR settings 2019-12-09 09:38:41 +00:00
acpi_tables.c
board_id.c Split MAYBE_STATIC to _BSS and _NONZERO variants 2019-08-26 20:56:29 +00:00
board_id.h mb/intel/kblrvp: Fix unsigned val casting of smaller size 2019-01-16 11:57:24 +00:00
board_info.txt
bootblock.c
chromeos.c mb/*/chromeos.c: Remove some ENV_RAMSTAGE and __SIMPLE_DEVICE__ 2019-07-25 16:03:37 +00:00
chromeos.fmd mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files 2019-03-05 20:52:06 +00:00
cmos.layout
dsdt.asl soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi 2019-11-01 11:50:03 +00:00
ec.c
ec.h
hda_verb.c coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
Kconfig mb: remove test-only HWIDs 2019-09-30 11:33:35 +00:00
Kconfig.name mb/intel/kblrvp: Add new Kaby lake RVP11 support 2019-01-16 11:56:50 +00:00
mainboard.c src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
Makefile.inc arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class 2019-07-09 12:43:35 +00:00
ramstage.c soc/intel/skylake: devicetree: introduce PchHdaVcType fsp parameter 2019-10-02 11:15:00 +00:00
romstage.c mb/{asrock,intel,purism}: Copy channel arrays separately 2019-08-20 15:18:10 +00:00
smihandler.c src/mainboard: Remove not used #include <elog.h> 2019-09-15 20:35:34 +00:00