coreboot-kgpe-d16/src/northbridge/amd
Kyösti Mälkki 64df52e269 AGESA f14: Work around soft-resets
Vendorcode expects some DRAM controller registers to
be writable, but they are actually locked after soft
resets if C6 states are enabled.

Without the workaround, raminit fails on soft resets.

Change-Id: I6b9e275e11b2907d026c13341334983a4d9c8889
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21317
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-09-06 22:23:19 +00:00
..
agesa AGESA f14: Work around soft-resets 2017-09-06 22:23:19 +00:00
amdfam10 AMD K8 fam10-15: Tidy up CAR disable 2017-08-22 20:24:31 +00:00
amdht nb/amd: add IS_ENABLED() around Kconfig symbol references 2017-07-08 19:01:19 +00:00
amdk8 AMD K8 fam10-15: Tidy up CAR disable 2017-08-22 20:24:31 +00:00
amdmct nb/amd_fam10/mct_ddr3: Use common function to compute crc16 checksum 2017-08-10 15:55:33 +00:00
cimx nb/amd: add IS_ENABLED() around Kconfig symbol references 2017-07-08 19:01:19 +00:00
gx2 CBMEM: Clarify CBMEM_TOP_BACKUP function usage 2017-05-27 13:54:47 +02:00
lx CBMEM: Clarify CBMEM_TOP_BACKUP function usage 2017-05-27 13:54:47 +02:00
pi binaryPI: Introduce BINARYPI_LEGACY_WRAPPER and its counterpart 2017-08-02 05:11:04 +00:00