coreboot-kgpe-d16/src
Subrata Banik 69b18f0b68 mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT generation
This changes uses drivers/intel/wifi chip for CNVi device to ensure that:
1. Correct device name shows in ACPI name space
2. Correct wake up shows in cat /proc/acpi/wakeup
3. Remove cnvi.asl from soc/intel/cannonlake

Change-Id: Ic81de2dce6045ced913766790a40ed19119f5118
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/29399
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-11-07 16:41:49 +00:00
..
acpi
arch x86/acpi.c: Be more verbose when finding the wakeup vector 2018-11-06 13:52:24 +00:00
commonlib src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
console console: Set default loglevel to 8 (SPEW) for CONFIG_CHROMEOS 2018-10-18 12:50:41 +00:00
cpu cpu/amd: Use common AMD's MSR 2018-11-05 09:05:51 +00:00
device src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
drivers amd: Fix non-local header treated as local 2018-11-05 09:00:26 +00:00
ec chromeec: Disable battery remaining capacity workaround 2018-11-06 17:38:43 +00:00
include intel: Get rid of smm_get_pmbase 2018-11-07 07:05:23 +00:00
lib src/lib/edid: avoid buffer overflow 2018-11-06 14:07:58 +00:00
mainboard mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT generation 2018-11-07 16:41:49 +00:00
northbridge nb/intel/x4x/raminit: Add missing space 2018-11-05 09:16:07 +00:00
security src: Add missing include <stdint.h> 2018-11-01 11:25:07 +00:00
soc mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT generation 2018-11-07 16:41:49 +00:00
southbridge intel: Get rid of smm_get_pmbase 2018-11-07 07:05:23 +00:00
superio src: Add missing include <stdint.h> 2018-11-01 11:25:07 +00:00
vendorcode sb/intel/lynxpoint: Include <stdint.h> to fix compilation errors 2018-11-01 22:24:24 +00:00
Kconfig reset: Finalize move to new API 2018-10-31 15:29:42 +00:00