coreboot-kgpe-d16/src/cpu/intel/car
Kyösti Mälkki 6a8ce0d250 cpu/intel/car: Prepare for some POSTCAR_STAGE support
The file cache_as_ram_ht.inc is used across a variety
of CPUs and northbridges. We need to split it anyway
for future C_ENVIRONMENT_BOOTBLOCK and verstage work.

Split and rename the files, remove code that is globally
implemented in POSTCAR_STAGE framework already.

Change-Id: I2ba67772328fce3d5d1ae34c36aea8dcdcc56b87
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26747
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-02 21:57:51 +00:00
..
p4-netburst cpu/intel/car: Prepare for some POSTCAR_STAGE support 2018-06-02 21:57:51 +00:00
cache_as_ram.inc cpu/intel/car/cache_as_ram.inc: Fix long standing issues 2017-09-12 07:54:59 +00:00
cache_as_ram_ht.inc cpu/*: Add whitespace around '<<' 2017-06-28 00:23:32 +00:00
romstage.c cpu/intel/car: Prepare for some POSTCAR_STAGE support 2018-06-02 21:57:51 +00:00
romstage_legacy.c cpu/intel: Fix the spacing issues 2017-03-16 04:13:24 +01:00