coreboot-kgpe-d16/src
Aaron Durbin 6ba1b628ee arm64: ensure vital sections aren't garbage collected
The driver structures live in special sections which have no
direct reference to the symbols. Therefore, when garbage
collecting sections in the linker the drivers are tossed out
resulting in no drivers being linked into ramstage. Fix this
by adding the KEEP() directive to those special sections.

BUG=chrome-os-partner:29923
BRANCH=None
TEST=Built and noted console starts working in ramstage.

Original-Change-Id: Iaa0fd428bf975c82d4e6b0e75a17e6fd231fbaa9
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/207261
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 7c1a3e63e398755de0c77524a0483e6f1019aac0)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I1e30e73be754ec849cb3cfac3bcb12e95b0f60d4
Reviewed-on: http://review.coreboot.org/8584
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-04 19:59:46 +01:00
..
arch arm64: ensure vital sections aren't garbage collected 2015-03-04 19:59:46 +01:00
console Add stage information to coreboot banner 2015-03-04 19:46:25 +01:00
cpu cpu/amd/model_10xxx: Documentation update 2015-03-04 06:16:22 +01:00
device devicetree: Drop dummy root_dev ops 2015-03-01 21:53:58 +01:00
drivers drivers/i2c/w83793: Use devicetree.cb to set additional values 2015-02-26 06:20:07 +01:00
ec acpi: Generate valid ACPI processor objects 2015-02-16 21:02:30 +01:00
include coreboot memrange: Two changes for zero size or empty memrange 2015-03-04 19:55:19 +01:00
lib coreboot memrange: Two changes for zero size or empty memrange 2015-03-04 19:55:19 +01:00
mainboard rush: PMIC: initial AS3722 PMIC writes for Rush 2015-03-04 19:56:26 +01:00
northbridge cpu/amd/model_10xxx: Refactor model detection to reduce code duplication 2015-03-04 06:15:55 +01:00
soc coreboot t132: Stack init re-work 2015-03-04 19:58:30 +01:00
southbridge x86: Fix pointer arithmetic regressions from MMIO changes 2015-02-27 18:15:33 +01:00
superio superio/fintek/f81216h: Add the correct unlock key values 2015-02-14 00:53:26 +01:00
vendorcode AMD cimx/sb800: Disable unused GPP ports 2015-02-14 22:37:33 +01:00
Kconfig nvram: Add option to reset NVRAM to default parameters on every boot 2015-02-16 08:36:37 +01:00