coreboot-kgpe-d16/src/soc/intel/tigerlake
Tim Wawrzynczak 6d20d0c140 soc/intel/tigerlake: Move PMC PCI resources under PMC device
Historically in coreboot, the PMC's fixed PCI resources were described
by the System Agent (the MMIO resource), and eSPI/LPC (the I/O
resource). This patch moves both of those to a new Intel SoC-specific
function, soc_pmc_read_resources(). On TGL, this new function takes care
of providing the MMIO and I/O resources for the PMC.

BUG=b:156388055
TEST=verified on volteer that the resource allocator is aware of and
does not touch these two resources:
("PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0
	flags f0000200 index 0
  PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff
	flags c0000100 index 1")

Also verify that the MEM resource is described in the coreboot table:
("BIOS-e820: [mem 0x00000000fe000000-0x00000000fe00ffff] reserved")

Verified the memory range is also untouchable from Linux:
("system 00:00: [mem 0xfe000000-0xffffffff] could not be reserved")

Change-Id: Ia7c6ae849aefaf549fb682416a87320907fb3fe3
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41385
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-20 09:49:00 +00:00
..
acpi soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method 2020-05-18 07:07:03 +00:00
bootblock treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
include/soc soc/intel/tigerlake: Move PMC PCI resources under PMC device 2020-05-20 09:49:00 +00:00
romstage soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En 2020-05-18 07:34:08 +00:00
acpi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
chip.c soc/intel/tigerlake: Move PMC PCI resources under PMC device 2020-05-20 09:49:00 +00:00
chip.h tigerlake: update processor power limits configuration 2020-05-20 09:14:11 +00:00
cpu.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
elog.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
espi.c soc/intel/tigerlake: Move PMC PCI resources under PMC device 2020-05-20 09:49:00 +00:00
finalize.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
fsp_params.c soc/tigerlake: Add devicetree configurability for IomTypeCPortPadCfg 2020-05-20 09:13:16 +00:00
gpio.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
graphics.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
gspi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
i2c.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig tigerlake: update processor power limits configuration 2020-05-20 09:14:11 +00:00
lockdown.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Makefile.inc soc/intel/tigerlake: Remove eMMC/SD support 2020-04-17 20:00:15 +00:00
me.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
meminit.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
p2sb.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pmc.c soc/intel/tigerlake: Move PMC PCI resources under PMC device 2020-05-20 09:49:00 +00:00
pmutil.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
reset.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
smihandler.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
smmrelocate.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
spi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
systemagent.c soc/intel/tigerlake: Move PMC PCI resources under PMC device 2020-05-20 09:49:00 +00:00
uart.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00