Furquan Shaikh 6e37e90193 soc/intel/apollolake: Include gpe.h in chip.h ... This is required for using GPE_* macros in devicetree.cb. BUG=chrome-os-partner:55670 Change-Id: I8f6f536df96cf8145bb0c03ec413fb2f374301b5 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15946 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>		2016-07-30 00:53:27 +02:00
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acpi	intel/apollolake: Add soc specific DPTF values	2016-07-28 20:10:15 +02:00
bootblock	soc/intel/apollolake: Fix bitshift issue in bootblock	2016-07-19 18:57:13 +02:00
include/soc	soc/intel/apollolake: Update FSP Header files for version 146_30	2016-07-28 21:21:06 +02:00
acpi.c	intel/apollolake: Update gnvs for dptf	2016-07-28 20:13:34 +02:00
car.c	soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CAR	2016-04-22 17:27:34 +02:00
chip.c	soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume	2016-07-29 00:09:05 +02:00
chip.h	soc/intel/apollolake: Include gpe.h in chip.h	2016-07-30 00:53:27 +02:00
cpu.c	soc/apollolake: SOC specific SMM code	2016-05-25 19:09:21 +02:00
dsp.c	soc/intel/apollolake: Add Audio DSP device	2016-07-02 03:23:12 +02:00
exit_car.S
gpio.c	soc/intel/apollolake: set gpio interrupt polarity in ITSS	2016-07-13 21:58:37 +02:00
graphics.c	soc/intel/apollolake: Add new Intel HD Graphics Device ID's.	2016-07-21 04:34:09 +02:00
heci.c	soc/intel/apollolake: Add basic HECI support	2016-07-19 20:19:51 +02:00
i2c.c	soc/intel/apollolake: Add support for LPSS I2C driver	2016-07-02 01:18:22 +02:00
i2c_early.c	soc/intel/apollolake: Add support for LPSS I2C driver	2016-07-02 01:18:22 +02:00
itss.c	soc/intel/apollolake: work around FSP for gpio interrupt polarity	2016-07-13 21:58:50 +02:00
Kconfig	vboot: Separate vboot from chromeos	2016-07-28 00:36:00 +02:00
lpc.c	vboot: Separate vboot from chromeos	2016-07-28 00:36:00 +02:00
lpc_lib.c	soc/apollolake/lpc_lib: Make cros compile pass	2016-05-19 03:47:08 +02:00
Makefile.inc	soc/intel/apollolake: ensure usb port 0 is in host mode	2016-07-24 00:08:22 +02:00
meminit.c	soc/intel/apollolake: clarify meaning of LPDDR4 density meaning	2016-07-22 18:51:29 +02:00
memmap.c	soc/apollolake/memmap: Switch to SIMPLE_DEVICE API	2016-05-26 23:46:25 +02:00
mmap_boot.c	region: Add writeat and eraseat support	2016-06-24 20:48:12 +02:00
nhlt.c	soc/intel/apollolake: add initial NHLT support	2016-07-01 03:21:09 +02:00
northbridge.c	soc/intel/apollolake: fix incorrect bdsm -> tolud memory resources	2016-05-06 16:50:27 +02:00
p2sb.c	soc/intel/apollolake: handle p2sb quirks	2016-07-02 03:22:32 +02:00
pmc.c	soc/intel/apollolake: Add GPE routing code	2016-07-02 03:30:28 +02:00
pmutil.c	vboot: Separate vboot from chromeos	2016-07-28 00:36:00 +02:00
reset.c	drivers/intel/fsp2_0: Split reset handling logic	2016-07-19 21:03:03 +02:00
romstage.c	drivers/intel/fsp2_0: handle XIP and non-XIP for FSPM component	2016-07-19 20:16:11 +02:00
smi.c	soc/apollolake: SOC specific SMM code	2016-05-25 19:09:21 +02:00
smihandler.c	soc/intel/apollolake: provide fake PM1 SMI status bit	2016-06-12 12:52:28 +02:00
spi.c	intel/apollolake: Enable prefetching and caching for BIOS reads	2016-06-23 23:11:35 +02:00
tsc_freq.c
uart.c	soc/apollolake/uart.c: Do not NOOP .set_resources() and friends	2016-05-12 04:01:58 +02:00
uart_early.c	drivers/uart: Use uart_platform_refclk for all UART models	2016-05-09 18:45:44 +02:00
xhci.c	soc/intel/apollolake: ensure usb port 0 is in host mode	2016-07-24 00:08:22 +02:00