coreboot-kgpe-d16/src/cpu/amd
Yinghai Lu 6f63c0297c support HDT disassembly when cache as ram auto stage
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-14 20:08:23 +00:00
..
car support HDT disassembly when cache as ram auto stage 2005-12-14 20:08:23 +00:00
dualcore 1201_ht_bus0_dev0_fidvid_core.diff 2005-12-02 21:52:30 +00:00
microcode issue 25, various AMD patches 2005-11-23 04:56:36 +00:00
model_fxx issue 51 and 52: set mtrr for ap before stop it, and _RAMBASE above 1M 2005-12-14 02:39:33 +00:00
model_gx1 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-29 2005-07-06 17:11:02 +00:00
mtrr eric patch 2005-07-08 02:49:49 +00:00
sc520 This was posted on issue tracker and approve by ron minnich 2005-11-21 23:22:21 +00:00
socket_754 mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a complex expression. 2004-11-11 06:53:24 +00:00
socket_940 mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a complex expression. 2004-11-11 06:53:24 +00:00