Kyösti Mälkki 6fcee7533c soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS ... According to received feedback, FSP-T enables MMCONF at address 0xe0000000 with 256 busses. Sanity-check that Kconfig matches that. Add MMCONF_BUS_NUMBER such that MCFG in ACPI will be correct. Change-Id: I01309638a9f4ada71e5e3789db34892ed4abfa3b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50665 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2021-08-19 18:14:59 +00:00
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acpi	soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS	2021-08-19 18:14:59 +00:00
bootblock	soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS	2021-08-19 18:14:59 +00:00
include/soc	cpu/intel: Add dedicated file to grow Intel CPUIDs	2021-07-17 09:50:14 +00:00
acpi.c	soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS	2021-08-19 18:14:59 +00:00
chip.c
chip.h
cpu.c
csme_ie_kt.c
fiamux.c
gpio.c
gpio_dnv.c
hob_display.c
hob_mem.c
Kconfig	soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS	2021-08-19 18:14:59 +00:00
lpc.c	arch/x86/ioapic: Drop irq_on_fsb as a configurable item	2021-06-16 19:54:49 +00:00
Makefile.inc	soc/intel/denverton_ns: Remove SOC specific FSP location overrides	2021-06-16 06:05:34 +00:00
memmap.c
npk.c
pmc.c
pmutil.c
reset.c
romstage.c
sata.c
smihandler.c
smm.c
soc_util.c	arch/x86: Use ENV_X86_64 instead of _x86_64_	2021-07-06 06:09:13 +00:00
spi.c
systemagent.c
tsc_freq.c
uart.c
uart_debug.c
upd_display.c
xhci.c