Felix Held 753827ef33 soc/amd/picasso/acpi: include pci_int_defs.asl from soc.asl ... Instead of including pci_int_defs.asl in each board's DSDT, include it in the common soc.asl. This moves the PRQM OperationRegion and the PRQI IndexField defined in pci_int_defs.asl into the \_SB scope, but those are defined inside the \_SB scope both in the Picasso reference code and for the AMD SoCs from Cezanne on. TEST=Both Linux and Windows still boot and don't show ACPI errors on Mandolin after moving this inside the \_SB scope Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib4e7bfb15de184cc43cd17c8249be0f59405793f Reviewed-on: https://review.coreboot.org/c/coreboot/+/69188 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>		2022-11-09 15:47:31 +00:00
..
variants	src/mainboard to src/security: Fix spelling errors	2021-10-05 18:06:52 +00:00
board_info.txt
bootblock.c	mb/amd/mandolin: Add decode range for LPC debug card	2020-11-25 09:13:41 +00:00
dsdt.asl	soc/amd/picasso/acpi: include pci_int_defs.asl from soc.asl	2022-11-09 15:47:31 +00:00
emmc_gpio.c	soc/amd: rename program_gpios to gpio_configure_pads	2021-09-23 14:42:03 +00:00
gpio.h
hda_verb.c	mainboard/amd/mandolin: describe where the two HDA codecs reside	2020-07-22 14:43:13 +00:00
Kconfig	mb/(amd,google): Update SPI Kconfig settings based on devicetree	2021-08-28 17:42:22 +00:00
Kconfig.name	mb/amd: Add Pollock CRB Cereme as Mandolin variant	2020-09-30 22:24:31 +00:00
mainboard.c	mb/amd/mandolin: handle invalid intr_index values in init_tables	2022-10-26 22:09:39 +00:00
Makefile.inc	soc/amd/*/Makefile.inc: Do some cosmetics	2022-05-12 11:12:31 +00:00
romstage.c