Keith Hui a8380fcfd8 intel/i440bx: Correct RAM init programming ... Corrects MBSC/MBFS programming when initializing DRAM on boards with both 3 and 4 DIMM slots. Reformats comments to current coreboot standards. Drops some romcc "optimizations" no longer necessary. Boot tested on asus/p2b-ls, where it fixes a memory related hang after SeaBIOS resets the board with nothing to boot from. Change-Id: Ib8c21489338643e13f69bd58008d14733796d4d0 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/22687 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2017-12-09 16:54:44 +00:00
..
acpi
debug.c	nb/intel/i440bx/debug.c: Bugfix and cleanup	2017-09-01 14:59:18 +00:00
i440bx.h	northbridge/intel/i440bx: Move NB macro to i440bx.h	2017-07-22 22:50:08 +00:00
Kconfig	intel/i440bx: Move LATE_CBMEM_INIT under mainboard	2017-09-01 14:39:16 +00:00
Makefile.inc	intel/i440bx: Implement EARLY_CBMEM_INIT support	2017-09-13 17:21:56 +00:00
northbridge.c	intel/i440bx: Implement EARLY_CBMEM_INIT support	2017-09-13 17:21:56 +00:00
northbridge.h
ram_calc.c	intel/i440bx: Implement EARLY_CBMEM_INIT support	2017-09-13 17:21:56 +00:00
raminit.c	intel/i440bx: Correct RAM init programming	2017-12-09 16:54:44 +00:00
raminit.h	northbridge/intel/i440bx: Merge RAM init routines	2017-07-23 20:20:26 +00:00