Maulik V Vaghela 7749c34a11 soc/intel/jasperlake: Configure IPU based on devicetree ... FSP enables IPU (Imaging Processing Unit) by default even if its disabled in devicetree. We need to fill FSP upd based on the device enablement in devicetree. BUG=None BRANCH=None TEST=IPU is disabled and doesn't show in lspci. Change-Id: I0f9a40e85427fd88bb12a40770ecf7b939b1d8cd Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2020-08-18 08:46:33 +00:00
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apollolake	soc/intel/apollolake: Rename UART irqs	2020-08-10 10:45:46 +00:00
baytrail	{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code	2020-08-05 15:46:17 +00:00
braswell	{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code	2020-08-05 15:46:17 +00:00
broadwell	soc/intel/broadwell/iobp: Log success in pch_iobp_write()	2020-08-07 11:57:32 +00:00
cannonlake	soc/intel/cannonlake: Set FSP-M UPD Heci1BarAddress	2020-08-12 17:39:49 +00:00
common	soc/intel/common: Add support for LPSS UART in ACPI mode	2020-08-18 05:53:43 +00:00
denverton_ns	cpu,soc/intel: Drop select SMP	2020-07-26 20:59:52 +00:00
icelake	soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming	2020-08-09 11:03:37 +00:00
jasperlake	soc/intel/jasperlake: Configure IPU based on devicetree	2020-08-18 08:46:33 +00:00
quark	src: Make HAVE_CF9_RESET set the FADT reset register	2020-07-20 13:23:13 +00:00
skylake	soc/intel/skylake/acpi.c: Name devices on secondary bus	2020-08-17 07:12:46 +00:00
tigerlake	soc/intel/tigerlake: Allow fine grained control of S0iX states	2020-08-17 07:11:19 +00:00
xeon_sp	soc/intel/xeon_sp/cpx: add VT-d support	2020-08-14 09:08:24 +00:00
Kconfig	fsp2_0: Gather Kconfig declarations	2020-04-05 23:26:24 +00:00