coreboot-kgpe-d16/src/cpu
efdesign98 7c0c64e103 Addition of Family12/SB900 wrapper code
This change adds the wrapper code for the AMD Family12
cpus and the AMD Hudson-2 (SB900) southbridge to the cpu,
northbridge and southbridge folders respectively.

Change-Id: I22b6efe0017d0af03eaa36a1db1615e5f38da06c
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/53
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-28 23:09:25 +02:00
..
amd Addition of Family12/SB900 wrapper code 2011-06-28 23:09:25 +02:00
intel Enable caching for ROM area in model_6ex/cache_as_ram.inc 2011-05-03 07:55:43 +00:00
via more ifdef -> if fixes 2011-04-21 20:45:45 +00:00
x86 SMM: flush caches after disabling caching 2011-06-18 10:02:22 +02:00
Kconfig - Fix shortcoming in Kconfig when handling multiple "choice"s 2010-12-16 23:37:17 +00:00
Makefile.inc qemu: drop "northbridge.c" from src/cpu/... 2010-03-29 21:17:25 +00:00