a7b296d450
- Fix some poor programming practice (breaks of strict aliasing as well as not checking the return value of read) - Use PRIx64 instead of %llx to prevent compilation warnings with both 32bit and 64bit compilers - Use same compiler command options when linking inteltool and when detecting libpci for inteltool Change-Id: I08b2e8d1bbc908f6b1f26d25cb3a4b03d818e124 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/752 Tested-by: build bot (Jenkins) Reviewed-by: Mathias Krause <minipli@googlemail.com> |
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.. | ||
accessors | ||
cli | ||
COPYING | ||
ChangeLog | ||
DISCLAIMER | ||
Makefile | ||
README | ||
cbfs.c | ||
cbfs.h | ||
cmos_lowlevel.c | ||
cmos_lowlevel.h | ||
cmos_ops.c | ||
cmos_ops.h | ||
common.c | ||
common.h | ||
compute_ip_checksum.c | ||
coreboot_tables.h | ||
hexdump.c | ||
hexdump.h | ||
input_file.c | ||
input_file.h | ||
ip_checksum.h | ||
layout.c | ||
layout.h | ||
lbtable.c | ||
lbtable.h | ||
nvramtool.spec | ||
reg_expr.c | ||
reg_expr.h |
README
Summary of Operation -------------------- nvramtool is a utility for reading/writing coreboot parameters and displaying information from the coreboot table. It is intended for x86-based systems (both 32-bit and 64-bit) that use coreboot. The coreboot table resides in low physical memory, and may be accessed through the /dev/mem interface. It is created at boot time by coreboot, and contains various system information such as the type of mainboard in use. It specifies locations in the CMOS (nonvolatile RAM) where the coreboot parameters are stored. For information about coreboot, see http://www.coreboot.org/. Ideas for Future Improvements ----------------------------- 1. Move the core functionality of this program into a shared library. 2. Consider adding options for displaying other BIOS-provided information such as the MP table, ACPI table, PCI IRQ routing table, etc.