coreboot-kgpe-d16/src/southbridge
Marshall Dawson 7fd0bc84ff amd/pi/hudson: Reduce amdfw space requirement
Change the current implementation so that multiple PSP directory
structures are not included, saving 448 KB.

AMD created a mechanism so that multiple generations of APUs, in
identical packages, may be supportable in one BIOS image.  The PSP
identifies the correct directory table by checking one of two
pointers in the Embedded Firmware structure.  Coreboot doesn't
implement this capability, however it has been constructing
amdfw.rom with two identical directory tables and two copies of
each PSP blob.

Tested on Bettong (Merlin Falcon / Carrizo) and Jadeite (Stoney).

Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 11dfc3f621344db66d92b61d72927128ea48685f)

Change-Id: I139f3bfdb319af803fef64e7bd848e95945f41aa
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18990
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-28 22:30:36 +02:00
..
amd amd/pi/hudson: Reduce amdfw space requirement 2017-03-28 22:30:36 +02:00
broadcom amdfam10: Perform major include ".c" cleanup 2017-01-04 18:56:01 +01:00
intel southbridge/intel/i82801gx: Fix problems found by checkpatch.pl 2017-03-22 17:55:53 +01:00
nvidia southbridge/nvidia/mcp55: Get rid of #include early_smbus.c 2017-03-21 18:11:39 +01:00
ricoh/rl5c476 sb/ricoh/rl5c476/rl5c476.c: Use tab for indents 2016-11-28 01:03:34 +01:00
sis/sis966 PCI ops: Remove conflicting duplicate declarations 2016-12-06 20:44:12 +01:00
ti southbridge/ti: Update license headers 2016-04-13 17:36:00 +02:00
via via/k8t890: Compose a list of PCI IDs 2016-11-22 18:30:16 +01:00