Martin Roth c5b0e3b566 southbridge/via: Update license headers ... Update all of the license headers to make sure they are compliant with coreboot's license header policy. Change-Id: Id6d11d1cea3ebde4adf63e3d98ac603d85591d5b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/14331 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2016-04-13 17:36:14 +02:00
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acpi	acpi/: add missing license header	2016-01-14 22:52:11 +01:00
arch	Change la to li (load immediate)	2016-04-08 22:35:23 +02:00
commonlib	arch/x86: introduce postcar stage/phase	2016-03-23 14:24:30 +01:00
console	arch/x86: introduce postcar stage/phase	2016-03-23 14:24:30 +01:00
cpu	cpu/x86/tsc: Compile TSC timer for postcar as well	2016-04-11 17:56:57 +02:00
device	src/device: Update license headers	2016-04-13 17:34:18 +02:00
drivers	drivers/intel/fsp2_0: Add utility to recover MRC NV Storage data	2016-04-08 00:46:12 +02:00
ec	ec/lenovo/h8: do not reset volume on s3 wakeup	2016-04-10 18:14:15 +02:00
include	edid: Make framebuffer row alignment configurable	2016-04-07 20:46:38 +02:00
lib	edid: Make framebuffer row alignment configurable	2016-04-07 20:46:38 +02:00
mainboard	mainboard/google: Update license headers	2016-04-13 17:34:04 +02:00
northbridge	and/nb/mct_ddr3: Pack all structures passed to ramstage and set alignment	2016-04-11 18:19:13 +02:00
soc	src/soc/marvell: Update license headers	2016-04-13 17:34:33 +02:00
southbridge	southbridge/via: Update license headers	2016-04-13 17:36:14 +02:00
superio	superio/winbond/w83667hg-a: Set SPI device mask correctly	2016-04-08 18:36:14 +02:00
vendorcode	chromeos: Fix adding a bmpblk to GBB	2016-04-05 13:37:11 +02:00
Kconfig	Kconfig: remove COMPRESS_PRERAM_STAGES option from x86	2016-03-11 16:52:38 +01:00