coreboot-kgpe-d16/src/mainboard/intel/adlrvp/variants
Meera Ravindranath 89356d142b mb/intel/adlrvp_p: Enable TCSS USB ports device path
TEST=Boot RVP, ensure Type C ports operate correctly.

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: Iadc0df2e6e29a5afbcbb7db1ae0be6546dbcdc1a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2021-09-14 14:04:30 +00:00
..
adlrvp_m
adlrvp_m_ext_ec mb/intel/adlrvp: Use device aliases 2021-06-05 19:54:43 +00:00
adlrvp_p
adlrvp_p_ext_ec mb/intel/adlrvp_p: Enable TCSS USB ports device path 2021-09-14 14:04:30 +00:00
adlrvp_p_mchp mb/adlrvp: Add new ADL P board variant for MCHP1727 2021-09-13 13:59:45 +00:00