coreboot-kgpe-d16/src/mainboard/intel/adlrvp
Kane Chen 2a30359d5a mb/google/brya/var/brask: Set vGPIO reset type
Due to the vGPIO is not reset when we power on through S5, we would
met MCA when PCIE send L1 request without following Ack

BUG=b:207625007
TEST=S0->S3->S5->power key->S3->S0, see if boot up normal

Change-Id: I20cdd1650d1ca774065a6c051006dfd0b7a3fd79
Signed-off-by: Curtis Chen <curtis.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59726
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-12-03 15:38:00 +00:00
..
include/baseboard mb/intel/adlrvp: Configure EC in RW GPIO 2021-11-02 08:22:10 +00:00
spd mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU 2021-08-13 18:04:02 +00:00
variants mb/intel/adlrvp_p: Enable TCSS USB ports device path 2021-09-14 14:04:30 +00:00
board_id.c
board_id.h
board_info.txt
bootblock.c mb/{google, intel}: Make use of `cpu/intel/cpu_ids.h' 2021-07-19 18:25:42 +00:00
chromeos.c Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" 2021-11-15 12:00:12 +00:00
chromeos.fmd mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B 2021-11-09 19:19:51 +00:00
devicetree.cb mb/intel/adlrvp: Enable CPU PCIe RP 2 2021-11-19 06:21:21 +00:00
devicetree_m.cb mb/intel/adlrvp_m: Enable touchpad 2021-10-20 15:48:22 +00:00
dsdt.asl mb/intel/adlrvp: Remove ASL code and enable dynamic SSDT creation for camera ACPI 2021-07-05 10:51:32 +00:00
early_gpio.c mb/google/brya/var/brask: Set vGPIO reset type 2021-12-03 15:38:00 +00:00
early_gpio_m.c mb/intel/adlrvp: Configure EC in RW GPIO 2021-11-02 08:22:10 +00:00
ec.c
fw_config.c mb/intel/adlrvp: Enable I2S audio codecs on ADL-M RVP 2021-07-21 15:43:16 +00:00
gpio.c ChromeOS: Replace with or add <types.h> 2021-11-11 06:25:12 +00:00
gpio_m.c mb/intel/adlrvp_m: Enable touchpad 2021-10-20 15:48:22 +00:00
Kconfig soc/intel/alderlake: Add Kconfigs for all PCH types 2021-12-02 12:36:25 +00:00
Kconfig.name mb/intel/adlrvp: Rework Kconfig 2021-10-20 19:42:22 +00:00
mainboard.c mb/intel/adlrvp: Use dedicated VBT files for ADL-M 2021-11-22 15:11:36 +00:00
Makefile.inc mb/intel/adlrvp: create dynamic power limits mechanism for thermal 2021-08-10 21:22:22 +00:00
memory.c mb/intel/adlrvp: Fix sagv point3 clipping to 4800Mhz 2021-11-17 00:35:59 +00:00
ramstage.c mb/google,intel: Fix indirect include bootmode.h 2021-11-05 15:39:54 +00:00
romstage_fsp_params.c mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU 2021-08-13 18:04:02 +00:00
smihandler.c