This patch adds psys_pmax calculation. There are two types of power
sources. One is barrel jack and the other is USB TYPE-C. The voltage
level is fixed for a barrel jack while TYPE-C may vary depending
on power ratings. We need to get voltage information from
EC and calculate correct psys_pmax value. The psys_pmax needs to be
set before FSP-S since FSP-S will handle the setting passing to pcode,
so move the routine ahead to variant_ramstage_init.
BUG=b:151972149
TEST=emerge-puff coreboot chromeos-bootimage
check firmware log and ensure psys_pmax is passed to FSP
check the data from dump_intel_rapl_consumption in the OS and
ensure the power data is close to an external power meter.
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Change-Id: I8ea01f856411e05a533489280fc2b4a46a1440c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
85801f670d